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Session B2 - Single Electron Devices Above 4K.
INVITED session, Monday morning, March 18
Room 221/228, America's center
A very small Si single-electron transistor (SET) was successfully fabricated on a SIMOX (separation by implanted oxygen) wafer. A 20-nm-wide one-dimensional Si wire connected to the two-dimensional source and drain Si layers on a SIMOX wafer is oxidized, which not only reduced the width and height of the wire, but constricted the wire at its ends by means of pattern-dependent oxidation.(Y. Takahashi et al., Electron. Lett., 31, 136 (1995).) In this process, oxygen atoms penetrate into the buried oxide layer through the slits opening on the patterned Si layer, and oxidize the Si layer from the backside. This makes the Si layer thinner along the pattern edge. On the other hand, in the center region of the Si wire, oxidation is suppressed by the stress accumulated during oxidation. Consequently, constricted regions are formed at the ends of the wire. This process converts a narrow Si wire into a very small Si island with a tunneling barrier at each end because both constricted regions produce potential barriers due to the quantum size effect. Since the size of the Si island is as small as about 10 nm, the total capacitance of the SET is reduced to a value of the order of 1 aF, which guarantees the conductance oscillation of the SET even at room temperature. A linear relation between the designed wire length and the gate capacitance of SETs was obtained, which clearly indicates that the single island was actually formed in the middle of the Si wire in a controlled way. In addition, our devices operate very stably. The conductance characteristics remain exactly the same after several tens of the thermal cycling between low temperature and room temperature. These results were achieved due to the highly reproducible fabrication process based on the thermal oxidation of Si.
* Work done in coraboration with A. Fujiwara, H. Namatsu, K. Kurihara, K. Iwadate, M. Nagase, and K. Murase.